Stratix 10 FPGA 100G Ethernet IP Block Design and Implementation for Synchronized Data Transfer

Work Description - Design, Planning, Implementation, Integration, And Verification Of Four 100g Ethernet Ip Blocks On Stratix 10 Rxpu Fpga For Synchronized Multi-slice Band 4 5a 5b Data Transfer

The Department of Atomic Energy, through the Centre Director of NCRA, is inviting tenders for a critical project involving the "Design, Planning, Implementation, Integration, and Verification of Four 100G Ethernet IP Blocks on Stratix 10 RXPU FPGA for Synchronized Multi-Slice Band 4.5a. 5b Data Transfer." This work, categorized under Job Works, is scheduled for a period of 365 days and will take place at NCRA TIFR, Pune. The tender is a single-stage, two-cover process, with Cover 1 encompassing the fee, pre-qualification, and technical bid, and Cover 2 dedicated to the financial bid. Key dates for prospective bidders include the document download and bid submission period commencing on July 31, 2026, at 04:45 PM and concluding on August 14, 2026, at 05:00 PM, with the bid opening scheduled for August 17, 2026, at 05:00 PM. A pre-bid meeting will be held on August 10, 2026, at 08:45 PM at NCRA PUNE. A mandatory Earnest Money Deposit (EMD) of ₹1,80,000 is required, payable to NCRA TIFR Pune, with options for Bank Guarantee or Standing Instruction. The tender reference number is NCRA WF065 CPPP 2026-27. Further details regarding the scope of work, technical specifications, and eligibility criteria can be found in the provided tender documents, Tendernotice_1.pdf, Tenderwf65.pdf, and BOQ_966923.xls.