Fpga Evaluation Kit For Verification

Work Description - Fpga Evaluation Kit For Verification

The Indian Space Research Organisation (ISRO), a Central Government Ministry/Department, invites global tenders for the procurement of an FPGA Evaluation Kit for Verification. The tender, reference number SAC/BPUR/SA202600031701, falls under the "Goods" category and focuses on Electronics Equipment. Interested parties can download tender documents from April 21, 2026, at 11:10 AM until May 7, 2026, at 3:00 PM. The bid submission window opens on April 21, 2026, at 11:15 AM and closes on May 7, 2026, at 3:00 PM. Bids will be opened on May 7, 2026, at 3:30 PM at SAC-AHMEDABAD. This is a single-cover tender, and no EMD or tender fee is applicable. The period of work is 120 days, and the bid validity is 120 days. Further details, including the detailed work description and relevant documents, are available in the tender documents, including Tendernotice_1.pdf and 2026-317 Tender for FPGA Evaluation kit.pdf. The Tender Inviting Authority is PSO, located at SAC-AHMEDABAD, Pincode 380015.