Indian Space Research Organisation Tender

Work Description - On Board Fpga Design And Verification On Rate Contract, For More Refer //eproc.gov.isro.in

The Indian Space Research Organisation (ISRO), a Central Government Ministry/Department, invites open tenders for "On Board FPGA Design and Verification on Rate Contract basis" with Tender Reference Number URSC/PR/IS202500131401. The estimated tender value is ₹14,14,58,000.00, and the contract duration is 1095 days. This tender falls under the "Services" category, specifically "Miscellaneous Services." Interested parties can download the tender documents starting from October 17, 2025, at 04:30 PM until November 7, 2025, at 02:30 PM. Bid submission also commences on October 17, 2025, at 04:30 PM and concludes on November 7, 2025, at 02:30 PM. The bid opening date is scheduled for November 7, 2025, at 03:00 PM at URSC, Bangalore. There is no tender fee or EMD required for this tender. The Tender Inviting Authority is PSO, B Jothi Lakshmi, located at U R Rao Satellite Centre, HAL old airport road, Vimanapura post, Bangalore-17, Pincode 560017. Two covers are required: one for Fee/PreQual/Technical documents (pdf format) and another for Finance documents (xls format). The tender documents, including Tendernotice_1.pdf and work_1120954.zip, provide further details and instructions. The bid validity period is 120 days. Further details can be found at //eproc.gov.isro.in.